sunxi: Cache line size definition
authorPaul Kocialkowski <[email protected]>
Sat, 16 May 2015 17:52:11 +0000 (19:52 +0200)
committerHans de Goede <[email protected]>
Tue, 19 May 2015 16:46:44 +0000 (18:46 +0200)
commit8a65f69c9cef09aebc20aca98a4ddbf2b4829995
treecb822d4355a80482aca76e1845a43525fd6be375
parent5bfdca0d4cebab34d3b81a4a8852d9ec3923b0b9
sunxi: Cache line size definition

Sunxi platforms use ARM Cortex A8, A7 and A15 (unsupported yet) CPU cores,
which all have 64 bytes cache line size.

This is required to e.g. enable USB gadget.

Signed-off-by: Paul Kocialkowski <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
include/configs/sunxi-common.h